1. Field of the Invention
The present invention relates to a mask defect inspecting method for a photomask used in a lithography process for a semiconductor device; a semiconductor device manufacturing method including the process of inspecting the photomask; a mask defect inspecting apparatus; a method for generating a defect influence map used in mask defect inspection of the photomask; a photomask evaluating method; and a computer program product.
2. Description of the Related Art
In recent years, in manufacture of a semiconductor memory device, high integration of elements, wirings and the like configuring a circuit or fining of a pattern of elements, wirings and the like is underway. For example, in the case of a DRAM (Dynamic Random Access Memory) which is a typical semiconductor memory device, it is necessary to form a pattern of 0.13 microns in design rule in fabrication of a 1G DRAM.
Conventionally photomask inspection is carried out by using a die-to-die comparative inspecting technique for comparing the same adjacent patterns with each other or a die-to-data base comparative inspecting technique for comparing a measuring pattern with a design pattern.
FIG. 21 is a schematic diagram depicting a defect inspecting apparatus for use in the conventional die-to-die comparative inspecting technique. The above-described defect inspecting apparatus comprises a light source 80, optical systems 81 and 82, and image sensors 84 and 85 such as CCD. In the above defect inspecting apparatus, the two optical systems 81 and 82 are used for such one light source 80.
A magnified image of a pattern of transmission light from the same two adjacent patterns formed on a photomask 83 is formed on the image sensors 84 and 85. As a result, the magnified image of the pattern of the above-described transmission light is converted into an electronic signal.
The optical systems 81 and 82 each include a reflection mirror 86 and objective lenses 87 and 88. The photomask 83 is placed on an X-Y stage 89. A position of the X-Y stage 89 is controlled by a stage control mechanism 90.
Electronic signals (sensor data) 91 and 92 obtained by the image sensors 84 and 85 are inputted into a comparative logical circuit 93. The comparative logical circuit 93 compares the electronic signals 91 and 92 with each other, and detects an unmatched portion (defect) on a pattern.
A computing unit 94 computes a coordinate of the above-described unmatched portion on the photomask 83 based on position information (X-Y coordinate) on the X-Y stage 89 from the stage control mechanism 90. The above-described coordinate is recorded as detect position information on a mask defect in a defect inspecting apparatus.
On the other hand, FIG. 22 shows a defect inspecting apparatus for use in the conventional die-to-data base comparative inspecting technique. A pattern generating circuit 96 generates a reference pattern 97 by using a design pattern stored in a data base 95. The comparative logical circuit 93 compares the reference pattern 97 with the sensor data 91 obtained from the optical system 81, and detects an unmatched portion of the pattern.
The computing unit 94 computes a coordinate of the above-described unmatched portion on the photomask 83 based on the unmatched portion detected by means of the comparative logical circuit 93 and the X-Y coordinate of the X-Y stage 89. The above coordinate is recorded as defect position information on a defect on a photomask (mask defect) in the defect inspecting apparatus.
However, the conventional die-to-die comparative inspecting technique and die-to-data base comparative inspecting technique have the following problems.
In a photomask, even if design rules are identical to each other, patterns of various sizes are allocated at portions. Therefore, an effect of a mask defect on a resist pattern (transferred pattern) upon a wafer, or an effect upon operation (feature) of a device to be formed on the wafer is different depending on a variety of portions of a pattern region in the photomask.
Here, the conventional die-to-die comparative inspecting technique and die-to-data base comparative inspecting technique are carried out without taking into consideration an effect of a mask defect on a resist pattern or device operation. Specifically, with respect to a controlled dimensional pattern determined for each design rule, in-plane inspection of a single photomask is carried out with detection sensitivity which should detect defect specification of a predetermined size.
In this way, the conventional photomask detection is carried out with uniform detection sensitivity without any discrimination of a portion at which a mask defect has an effect on a resist pattern or device operation or a portion at which the mask defect does not have an effect thereon. Thus, at some portions in an inspection region, inspection is occasionally carried out with detection sensitivity which is severer than necessary.
If inspection is carried out with detection sensitivity which is severer than necessary, a portion which is not essentially regarded as a mask defect may be detected as a mask defect (a pseudo defect). Thus, detecting defects of more types than necessary occurs, and a large amount of time is required for classification of the detected mask defects. In this manner, there occurs a problem that a photomask manufacturing period is prevented from being reduced, and, as a result, a semiconductor manufacturing period is prevented from being reduced.
In addition, as described above, the conventional die-to-die comparative inspecting technique and die-to-data base comparative inspecting technique fail to take into consideration an effect of a mask detect on a resist pattern or device operation. Thus, discrimination between a mask defect (pseudo defect) which does not have an effect on a resist pattern or device operation and a mask defect which has an effect thereon is not clear when an inspection result is obtained.
Because of this, verification of an effect of each mask defect on a resist pattern is carried out with a lithography simulation microscope (for example, MSM 100 available from Karl Zeiss Co., Ltd.) based on defect position information (defect coordinate), and the verified results are classified into a mask defect which has an effect on a resist pattern and a mask defect which does not an effect thereon. Then, with respect to the mask defect which has an effect on transfer, correction is carried out, and a photomask is shipped.
In this way, making discrimination between a mask defect which has an effect on a resist pattern or device operation and a mask defect which does not have an effect thereon causes an increase of manufacturing steps in number. In this manner, there occurs a problem that the photomask manufacturing period is prevented from being reduced, and, as a result, the semiconductor device manufacturing period is prevented from being reduced.
On the other hand, dimensional precision and defect specification required for a photomask for forming a circuit pattern is becoming rapidly more severe with fining. Therefore, the lowered yield in the photomask manufacturing steps is becoming problem.
Even if design rules are identical to each other, patterns of various sizes are allocated in the photomask. For example, a DRAM includes a cell portion whose pattern size is equal to that in design rule; and a peripheral circuit portion whose pattern size is greater than that in design rule is allocated.
It is considered that the cell portion includes a portion which is greatly affected by a mask defect and a portion which is less affected thereby. The mask defect influence used here include an effect of a mask defect upon a resist pattern (transferred pattern) on a wafer and an effect of a mask defect on operation (feature) of a device to be formed on the wafer.
Therefore, in the control of a photomask, it is considered rather more desirable to carry out inspection by classifying the mask in-plane into a severe portion and a not-severe portion than to carry out inspection with uniform severity.
From the foregoing, it is considered that a photomask to be judged as a good product exists from the viewpoint of a wafer among photomasks which have been conventionally disposed after judged to be a faulty product. Therefore, it will be increasingly more important to control a photomask from the viewpoint of a wafer in the improvement of yield in the photomask manufacturing process, and further, in the reduction of photomask price.
In the meantime, critical area analysis is known as one of techniques for predicting the yield of wafers, which has been developed from circuit design technology. With respect to a critical area computing method, for example, Jpn. Pat. Appln. KOKAI Publication No. 2002-100548 discloses two techniques, i.e., a wiring width expanding technique (geometry technique) and a Monte Calro technique.
The term “critical area” used here denotes an area which causes a fatal fault such as short-circuit between lines on a wafer in the case where a defect center exists. In addition, this type of defect is also called a killer defect.
FIG. 37A to FIG. 37C are conceptual views each showing a killer defect and a critical area with the geometry technique for use in a conventional circuit design technology.
FIG. 37A shows a foreign matter which causes a killer defect (left side) and a foreign matter which does not cause the killer defect (right side). The geometry technique assumes a circular electrically conductive foreign matter on a wafer. If wirings are connected to each other with a foreign matter, short-circuit occurs.
FIG. 37B shows an area which serves as a critical area. If the center of a foreign matter exists, an area with its minimum square area in which wirings are connected to each other with the foreign matter is defined as a critical area.
FIG. 37C shows a method of computing a critical area. Defined as a critical area is a region between wirings in which edges opposite to each other with respect to two adjacent wirings (lines) are left by increasing their wiring widths each by R/2 in radius of a critical matter.
A critical area exists for each size of the foreign matter. This critical area configures a distribution with respect to the size of foreign matter. The critical area distribution is given by a function indicating a relationship between the size of the foreign matter and the corresponding square area of the critical area.
A method for predicting the yield of photomasks includes using the above-described critical area analysis. However, even if the critical area analysis is applied intact to the yield of photomasks, it is difficult to achieve prediction of the yield of photomasks. The reason will be described below.
A photomask pattern is transferred onto a wafer, but the foreign matter on the photomask is not transferred onto the wafer while it is kept unchanged in shape. Thus, an effect of the foreign matter on the photomask upon a wiring pattern to be formed on the wafer is not always the same as that of the foreign matter on the wafer upon a wiring pattern.
Therefore, in the case where the prediction of the yield of photomasks has been carried out by using the conventional critical area analysis, a photomask to be judged as a good product exists from the viewpoint of wafer among the photomasks which have been judged to be a faulty product. In this case, the prediction of the yield of photomasks is incorrect.
In addition, on a photomask, a opaque defect and a clear defect exist as typical defects which have an effect on a wafer. The opaque defect used here denotes a defect which occurs when a light shield film or a semi-transparent film has remained on a transparent substrate at a portion which is essentially an exposed pattern. The white defect used here denotes a defect which occurs when a light shield film or a semi-transparent film has slipped off from the top of a transparent substrate at a portion which is essentially a reserved pattern.
Accordingly, in order to predict the yield of photomasks, it is required to compute a critical area separately with respect to such opaque and clear defects. However, there is no way for a wafer to discriminate these opaque and clear defects. Thus, in the conventional critical area analysis, the critical areas of the opaque and clear defects are not computed.
In short, the conventional critical area analysis is essentially a technique for predicting the yield of wafers. Thus, no consideration is taken into effective information for predicting the yield of photomasks, i.e., defect inspection information (mask defect information) used when a defect on a photomask is inspected. Therefore, even if the conventional critical area analysis is applied intact to the yield of photomasks, it is difficult to achieve a practical method for predicting the yield of photomasks.